题解 | #信号顺序调整#
信号顺序调整
https://www.nowcoder.com/practice/3f6db9ded7ca4de7981c0a826e924563
`timescale 1ns/1ns
module top_module(
input wire [12:0] in ,
output wire [12:0] out
);
wire [3:0] a,b,c,d;
assign {a,b,c,d} = in;
assign out = {d,c,b,a};
endmodule
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