题解 | #移位运算与乘法#

`timescale 1ns/1ns
module multi_sel(
input [7:0]d ,
input clk,
input rst,
output reg input_grant,
output reg [10:0]out
);
//*************code***********//
reg [1:0] x;
reg [7:0] din;

always@(posedge clk or negedge rst)
if(!rst)
        x<=0;
else 
    x<= (x==2'd3) ? 1'd0:x+1'd1;

always@(posedge clk or negedge rst)
if(!rst)
    begin
        out<=11'd0;
        input_grant<=1'b0;
    end
else
    case(x)
        2'd0:begin din<=d;out<=d;input_grant<=1'b1; end
        2'd1:begin out<=(din<<2)-din;input_grant<=1'b0; end
        2'd2:begin out<=(din<<3)-din;input_grant<=1'b0; end
        2'd3:begin out<=din<<3;input_grant<=1'b0; end
    endcase
//*************code***********//
endmodule