题解 | #脉冲同步器（快到慢）#

`timescale 100ps/100ps

module pulse_detect(
	input 				clka	, 
	input 				clkb	,   
	input 				rst_n		,
	input				sig_a		,

	output  		 	sig_b
);

	reg sig_mid;
	reg sig_mid_r,sig_mid_rr;
	reg detect_b;

	always @(posedge clka or negedge rst_n) begin
		if(rst_n == 1'b0)
			sig_mid <= 1'b0;
		else if(sig_a)
			sig_mid <= ~sig_mid;
		else
			sig_mid <= sig_mid;
	end

	always @(posedge clkb or negedge rst_n) begin
		if(rst_n == 1'b0)begin
			sig_mid_r <= 1'b0;
			sig_mid_rr <= 1'b0;
		end
		else begin 
			sig_mid_r <= sig_mid;
			sig_mid_rr <= sig_mid_r;
		end
	end

	always @(posedge clkb or negedge rst_n) begin
		if(rst_n == 1'b0)
			detect_b <= 1'b0;
		else
			detect_b <= sig_mid_rr;
	end
	assign sig_b = sig_mid_rr ^ detect_b;



    
endmodule