题解 | #根据状态转移表实现时序电路#
根据状态转移表实现时序电路
https://www.nowcoder.com/practice/455c911bee0741bf8544a75d958425f7
`timescale 1ns/1ns
module seq_circuit(
input A ,
input clk ,
input rst_n,
output Y
);
reg [1:0] current_state;
reg [1:0] next_state;
reg Y;
parameter s0=2'b00,
s1=2'b01,
s2=2'b10,
s3=2'b11;
//状态转移
always@(posedge clk or negedge rst_n) begin
if(!rst_n)
current_state <= s0;
else
current_state <= next_state;//
end
//状态转移条件
always@(*) begin
case(current_state)
s0:next_state = (A)?s3:s1;
s1:next_state = (A)?s0:s2;
s2:next_state = (A)?s1:s3;
s3:next_state = (A)?s2:s0;
default:
next_state = s0;
endcase
end
//输出
always@(*) begin
if(!rst_n)
Y <= 1'b0;
else if(current_state==s3)
Y <= 1'b1;
else
Y <= 1'b0;
end
endmodule