题解 | #使用8线-3线优先编码器Ⅰ实现16线-4线优先编码器#

`timescale 1ns/1ns
module encoder_83(
   input      [7:0]       I   ,
   input                  EI  ,
   
   output wire [2:0]      Y   ,
   output wire            GS  ,
   output wire            EO    
);
assign Y[2] = EI & (I[7] | I[6] | I[5] | I[4]);
assign Y[1] = EI & (I[7] | I[6] | ~I[5]&~I[4]&I[3] | ~I[5]&~I[4]&I[2]);
assign Y[0] = EI & (I[7] | ~I[6]&I[5] | ~I[6]&~I[4]&I[3] | ~I[6]&~I[4]&~I[2]&I[1]);

assign EO = EI&~I[7]&~I[6]&~I[5]&~I[4]&~I[3]&~I[2]&~I[1]&~I[0];

assign GS = EI&(I[7] | I[6] | I[5] | I[4] | I[3] | I[2] | I[1] | I[0]);
//assign GS = EI&(| I);
         
endmodule

module encoder_164(
   input      [15:0]      A   ,
   input                  EI  ,
   
   output wire [3:0]      L   ,
   output wire            GS  ,
   output wire            EO    
);
    wire [2:0] Y_1,Y_0;
    wire gs_1,gs_0;
    wire EO1;
    
encoder_83    encoder_83_U1(
    .I  (A[15:8]),
    .EI (EI),
   
    .Y  (Y_1),
    .GS (gs_1),
    .EO (EO1)  
);
    
encoder_83    encoder_83_U0(
    .I (A[7:0]),
    .EI (EO1),
   
    .Y  (Y_0),
    .GS (gs_0),
    .EO (EO)  
);
    assign L = {gs_1,Y_1[2]|Y_0[2],Y_1[1]|Y_0[1],Y_1[0]|Y_0[0]};
    assign GS = gs_1|gs_0;

endmodule