题解 | #使用8线-3线优先编码器Ⅰ实现16线-4线优先编码器#
使用8线-3线优先编码器Ⅰ实现16线-4线优先编码器
http://www.nowcoder.com/practice/dcfa838e43de4744bc976abee96dc566
使用两个8-3编码器实现，代码如下：
`timescale 1ns/1ns
module encoder_83(
input [7:0] I ,
input EI ,
output wire [2:0] Y ,
output wire GS ,
output wire EO
);
reg [2:0] Y_reg;
reg GS_reg;
reg EO_reg;
always @(*)begin
if(~EI) begin
Y_reg = 3'b000; GS_reg = 0; EO_reg= 0; end
else begin
casex(I)
8'b0000_0000: begin Y_reg = 3'b000; GS_reg = 0; EO_reg = 1; end
8'b1xxx_xxxx: begin Y_reg = 3'b111; GS_reg = 1; EO_reg = 0; end
8'b01xx_xxxx: begin Y_reg = 3'b110; GS_reg = 1; EO_reg = 0; end
8'b001x_xxxx: begin Y_reg = 3'b101; GS_reg = 1; EO_reg = 0; end
8'b0001_xxxx: begin Y_reg = 3'b100; GS_reg = 1; EO_reg = 0; end
8'b0000_1xxx: begin Y_reg = 3'b011; GS_reg = 1; EO_reg = 0; end
8'b0000_01xx: begin Y_reg = 3'b010; GS_reg = 1; EO_reg = 0; end
8'b0000_001x: begin Y_reg = 3'b001; GS_reg = 1; EO_reg = 0; end
8'b0000_0001: begin Y_reg = 3'b000; GS_reg = 1; EO_reg = 0; end
default: begin Y_reg = 3'b000; GS_reg = 0; EO_reg = 0; end
endcase
end
end
assign Y = Y_reg;
assign GS = GS_reg;
assign EO = EO_reg;
endmodule
module encoder_164(
input [15:0] A ,
input EI ,
output wire [3:0] L ,
output wire GS ,
output wire EO
);
wire [3:0] Y1;
wire GS_1;
wire EO_1;
wire [3:0] Y2;
wire GS_2;
wire EO_2;
encoder_83 U1(
.I(A[15:8]) ,
.EI(EI) ,
.Y(Y1[2:0]) ,
.GS(GS_1) ,
.EO(EO_1)
);
encoder_83 U2(
.I(A[7:0]) ,
.EI((EI)&&(~GS_1)) ,
.Y(Y2[2:0]) ,
.GS(GS_2) ,
.EO(EO_2)
);
assign L = ((~GS_1) && (~GS_2)) ? 0 : (GS_1) ? ({1'b0,Y1[2:0]} + 8) : (GS_2) ? ({1'b0,Y2[2:0]}) : 0;
assign GS = GS_1 || GS_2;
assign EO = EO_1 && EO_2;
endmodule
